Technical Note
8/18
www.rohm.com
2009.08 - Rev.A
?2009 ROHM Co., Ltd. All rights reserved.
BD9153MUV
?SPAN class="pst BD9153MUV-E2_2471427_7">Operation
BD9153MUV is a synchronous rectifying step-down switching regulator that achieves faster transient response by employing
current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier load,
while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency.
薙ynchronous rectifier
It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and
its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power
dissipation of the set is reduced.
薈urrent mode PWM control
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
鸓WM (Pulse Width Modulation) control
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a highside MOS FET (while a lowside MOS
FET is turned OFF), and an inductor current I
L
increases. The current comparator (Current Comp) receives two signals,
a current feedback control signal (SENSE: Voltage converted from I
L
) and a voltage feedback control signal (FB), and
issues a RESET signal if both input signals are identical to each other, and turns OFF the highside MOS FET (while a
lowside MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation.
鸖LLM
TM
(Simple Light Load Mode) control
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is
designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without
voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa.
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp,
it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned
OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching
dissipation and improves the efficiency.
Fig.29 Diagram of current mode PWM control
Fig.30 PWM switching timing chart
Fig.31 SLLM switching timing chart
Curren
Comp
SET
RESET
SW
VOUT
PVCC
GND
GND
GND
IL(AVE)
VOUT(AVE)
SENSE
FB
Curren
Comp
SET
RESET
SW
VOUT
Not switching
IL
PVCC
GND
GND
GND
0A
VOUT(AVE)
SENSE
FB
IL
OSC
Level
Shift
Driver
Logic
R Q
S
IL
SW
ITH
Current
Comp
Gm Amp.
SET
RESET
FB
Load
SENSE
VOUT
VOUT
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